One of methods usually used to reduce contact resistance at source/drain regions of a semiconductor structure is to form contact layers (which are usually metal silicide layers; accordingly, metal silicide layers are exemplified as contact layers hereinafter) on surfaces of source/drain regions. Namely, metal layers are deposited on surfaces of source/drain regions, then the semiconductor structure is annealed such that the metal layers react with source/drain regions to form metal silicide layers, then the metal layers that remain from reaction are removed at last. However, when aforesaid method is used to form metal silicide layers in the case source/drain regions are quite thin, for example, the semiconductor structure is ultra-thin SOI or finFET, silicon in source/drain regions would be easily depleted completely, and even silicon under sidewall spacers of a gate stack would be depleted as well during formation of metal silicide layers, which consequently leads to problems like silicide piping and further causes short-circuits between source and drain, during formation of metal silicide layers. Therefore, it is necessary to prevent complete depletion of silicon in source/drain regions during formation of metal silicide layers.
In the prior art, raised source/drain (RSD) or a self-limited process is usually used to prevent silicon in source/drain regions from being depleted completely. Wherein, the RSD method means to raise heads of source/drain regions to be higher than the bottom of the gate stack by way of, for example, epitaxial growing method. The RSD method can effectively increase thickness of source/drain regions, so as to prevent silicon in source/drain regions from being depleted completely by metal layers. Whereas, the self-limited process means to deposit metal layers on surfaces of source/drain regions, and then to remove the metal layers through etching or the like. In this case, although metal layers on surfaces of source/drain regions are removed, some metal has still come into source/drain regions during deposition; consequently, thin metal silicide layers would be formed on surfaces of source/drain regions after the semiconductor structure experiences annealing process. Since metal coming into source/drain regions is not so much that the thickness of the metal silicide layers is usually around 2 nm; therefore, it is an effective way to guarantee silicon in source/drain regions from being depleted completely.
However, abovementioned two methods still experience some defects. Although silicon in source/drain regions is saved from being depleted completely through increasing thickness of source/drain regions by means of RSD method, this also increases distance between metal silicide layers and channels at the meantime, thereby hindering performance of semiconductor devices. Likewise, although the metal silicide layers formed on surfaces of source/drain regions by means of self-limited process are quite thin, their lateral electrical resistance is rather great, which impairs performance of semiconductor devices as well.
Therefore, it is intended herein to provide a semiconductor structure and a method for manufacturing the same, which can overcome abovementioned problems.